What is known as the interconnect delay will present a serious problem in future chip generations. Although the introduction of copper instead of aluminum has resulted in a significant improvement with regard to the signal propagation time (or the proportion of “R” in what is known as the RC delay; R=resistance, C=capacitance), but there is still a lack of practicable ways of improving the proportion of “C”. The capacitive coupling C between the interconnects can be reduced by reducing the dielectric constant of the dielectric located between the metallic conductors. This problem cannot be solved by using the conventional dielectric silicon dioxide or its fluorinated variants, since these materials still have dielectric constants of over 3.
For some years, there has been work throughout the world on producing and integrating what are known as low k dielectrics, i.e. dielectrics with a low dielectric constant (k<3). Dielectrics of this type have dielectric constants of between 2.5 and 2.9, are already highly developed and are suitable for use from the 0.13 μm technology generation onward. Examples of these materials include Black Diamond (Advanced Materials), Oxazole Dielectric OxD (Infineon) or SiLK (Dow Chemical). The latter two materials, which are based on organic polymers, also have porous versions which are still in the development phase and reach k values of below 2.2. Moreover, there are numerous further porous inorganic materials, such as for example LKD produced by JSR, or XLK produced by Dow Corning.
WO 00/35000 A1 has described a process for producing semiconductor structures in which there are voids which surround connection lines and connection plugs, the voids being formed by removing an electrically conductive or semiconducting filler material.
U.S. Pat. No. 6,268,277 B1 has described a process in which semiconductor structures with voids are formed in dielectrics. In this case, passages which are in communication with voids are covered by deposition of a layer.
U.S. Pat. No. 6,211,561 B1 describes a process for producing semiconductor structures with voids in which air gaps are etched in and are then sealed with a layer.
WO 00/51177 describes the formation of semiconductor structures with air voids between interconnects. The air voids are formed by gaps by etching material.
US Patent application 2002/0019125 A1 describes the use of supportive elements for stabilizing voids in semiconductor structures.
U.S. Pat. No. 6,165,890 discloses a process for forming gaps in solid structures, in particular semiconductor structures, in which a polymer of the norbornene type is thermally decomposed, thereby leaving behind voids.
Air is known to have a dielectric constant of 1, and for this reason is recommended as the ideal dielectric. For this reason, there have hitherto been numerous attempts to use air as dielectric (known as air gaps). Example: Mark Lin, Mat. Res. Soc. Symp. Proc. Vol. 612 (2000), D.4.7.1 to D.4.7.6. However, previous air gap concepts either cannot be used for all feature sizes (i.e. are highly dependent on the design) or are so complex that they cannot be carried out economically.